With higher integration densities of semiconductor devices, their chip scales are minimized due to their reduced critical dimensions. These increased integration rates require improved photolithographic technologies for building circuit patterns having finer resolutions. This photolithography technology generally includes the steps of depositing, soft-baking, exposing, hard-baking, and then developing the subject semiconductors devices.
In baking wafers, an apparatus may be employed including a susceptor on which a wafer is mounted, and a plurality of guiding blocks for positioning the wafer on the susceptor. The susceptor may include a heating plate for warming the wafer, and a spacer for supporting the edges of the wafer on the heating plate. The wafer is moved into a reaction chamber by a transfer arm, and is then mounted on the susceptor by a lift pin.
During these operations, a wafer may be incorrectly placed on the susceptor in a sloped position. This situation occurs when the edges of the wafer are partially placed on the guiding blocks. This can occur due to malfunctions or positioning errors with respect to the transfer arms. Such an inclinedly positioned wafer may be irregularly heated causing manufacturing defects therein, and, in the extreme resulting in bending or cracking of wafer.
Furthermore, while a higher temperature during the baking process increases the expansion rate of a wafer, the guiding blocks are disposed at a constant distance from a wafer regardless of the processing temperature. Therefore, a wafer may engage the guiding blocks during a high temperature processing operation such as during baking.